Desired Experience : 4 Years to 6 Years of relevant experience.
Educational Qualification : Bachelor or Master Degree in Engineering.
Job Description
- Mask design work on various building blocks of SRAM or Register file design eg.
- Drawing mux cells, decoders, memory control, sense amplifiers etc.
- Drawing memory core arrays with proper termination at edges, corners and straps.
- The top level integration of memory instances in memory compiler environment. Regression DRC, LVS, density clean-up of memory instances across memory compiler space.
- The IR/EM testing and fixes of memory instances.
Required Experience:
Mandatory:
- Hands on experience in Memory leaf cell layout read/write controls, IO block, power gate cells, spacer cells, overlay cells, sense amplifiers Architecture development, EM,IR, area intensive layouts, Quality checks (QC)
- Work experience in deep sub-micron technologies like 28nm, 20nm
- Good understanding of the issues in the higher technologies
- EDA Tools: Cadence, Calibre
- Good English Language Communications (Oral & Written)
- Good Analytical & Problem Solving Capability
- Ability to Listen, take instructions & participate in teams
- Learn for knowledge and growth, Positive Work Attitude, Knowledge Sharing capability
- Scripting knowledge on perl, SKILL
- Quality of work to be first-time-right in all accepted tasks & deliveries
- Team leading experience
- Good Presentation Skills, Self-Initiative
