Walk-in Interview for DFT Engineer on 30 July 2016 @Bengaluru

Position:     DFT Engineer
Location:    Bengaluru / Pune / Hyderabad / Kochi
Experince : 4-10 Yrs   

Mandatory Skills

• Good knowledge of Hierarchical scan synthesis
  
• Handle module level scan insertion
• Handle device scan insertion with multiple clock domains. ATPG
• Able to do Block/ Device level pattern generation and simulations
• Scan interleaved with memory BIST patterns gen and validation
• Device level transition delay testing with multiple clocks, handling exceptions
• Able to do Sequential ATPG with RAMs and latches, coverage analysis
  

ViVeda Consulting Services Pvt. Ltd

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